Event Date
Dr. David Pan
Department of Electrical and Computer Engineering
Abstract
AI for chip design and electronic design automation (EDA) has received tremendous interests from academia and industry in recent years. It touches everything that chip designers care about, from power, performance, area (PPA), to yield, design productivity, security and so on. It is happening everywhere, at all levels of design abstractions, for digital and recently analog/RF IC designs. It has been used to tweak the overall design flow and hyper-parameter tuning, but not yet all at once, e.g., generative AI from design specification to layout, in a correct-by-construction manner. AI/ML can serve as hammers, bridges, and optimizers for various chip design/automation tasks, e.g., using deep neural network for hotspot detection, graph neural network for timing prediction, reinforcement learning for macro-placement and transistor sizing, large language models (LLM) for digital RTL and analog topology generations, and many more. In this talk, I will cover some recent results in AI for chip design in digital, analog/mixed-signal, and RF ICs, and discuss challenges and opportunities.
Biography
David Z. Pan is the Silicon Labs Endowed Chair Professor at the Department of Electrical and Computer Engineering, The University of Texas at Austin. He received his Ph.D. in Computer Science from UCLA in 2000 and worked at IBM T. J. Watson Research Center from 2000 to 2003 before joining UT Austin. His research interests include design automation for digital, analog, mixed-signal, RF ICs and emerging technologies, synergistic AI/IC co-optimizations, design and technology/system co-optimizations, etc. He has published over 540 refereed journal and conference papers and holds 10 US patents. He has served in many journal editorial boards and conference committees, including TPC Chair for DAC 2024 and ICCAD 2018, the two flagship conferences in EDA. He has received many awards, including SRC Technical Excellence Award in 2013, over 20 Best Paper Awards from premier EDA/chips/AI venues, DAC Top 10 Author Award in Fifth Decade, among others. He has graduated 57 PhD students and postdocs who are now holding key academic and industry positions, won many top awards, e.g., the ACM Student Research Competition Grand Finals 1 st Place (twice). He is a Fellow of ACM, IEEE, and SPIE.